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Hello!
I just design a module to read data analog from line in audio to ADC of WM8731 and use FIFO altera to transmit data to DAC, then analog from DAC transmit to line out. I want test AUDIO CODEC,but it not work. i config WM8731 with mode I2S. Sampling 48KHz. Somebody help me! What wrong? This is my code. Use verilog language. https://drive.google.com/file/d/0b2qzwhspevthyv8yv0m1t0fhsk0/view?usp=sharingLink Copied
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