FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6356 Discussions

FIR Compiler 9.1 generate incorrect outputs

Altera_Forum
Honored Contributor II
1,075 Views

Hi,  

 

I created a simple simulink model using DSP builder 9.1 sp1 blocks. 

 

The model runs at 120Mhz with 20.02Mhz input signal. After generating 20Mhz cos and sin signals from NCO block, the input signal is multiplied with NCO outputs, so that output signals are located at 0.02Mhz and around 40Mhz. 

Now I use FIR compilers to generate LPF for getting rid of 40Mhz image signals. 

However, the LPF output is not what I am expecting. 

 

Please review the attached model and share your feedback. 

 

Thank you. 

tim
0 Kudos
5 Replies
Altera_Forum
Honored Contributor II
353 Views

I don't have your tools but as you said, you get -0.02MHz and 40.02MHz.  

I checked your filter coefficients and it works and removes 40.02MHz. 

You are left with -0.02MHz. Your 0.02MHz will need several thousand samples to show one period. May be you are looking at few samples.
0 Kudos
Altera_Forum
Honored Contributor II
353 Views

Thank you for your comment. 

 

I collected many samples to see the pattern, but I couldn't see proper filter output. 

Also, FFT scope shows incorrect result, too. 

 

Could you run this model in your machine if available? 

 

Thanks again. 

Tim
0 Kudos
Altera_Forum
Honored Contributor II
353 Views

It might help if you send me text file of your output data

0 Kudos
Altera_Forum
Honored Contributor II
353 Views

Kaz, 

 

Please see the attached both I_out and Q_out samples. Before opening, you need to rename the extension to .mat format. 

 

I collected 12000 samples from both. 

 

 

Thanks. 

Tim
0 Kudos
Altera_Forum
Honored Contributor II
353 Views

Unfortunately I couldn't open your files. 

 

If you want to do fft in Matlab on your vectors then: 

 

IQ = complex(I,Q); 

f = linspace(-60,60,length(IQ)); 

plot(f,20*log10(abs(fftshift(fft(IQ)))));
0 Kudos
Reply