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Hi,
I have been lately trying to get the FIR II compiler to work. (the megafunction) However I am not able to get any kind of response from the filter implementation. Using the Megawizard plugin I generated a single channel FIR filter, fractional rate = 5/2, 100 MSPs, clock = 400MHz. I then map the component ports in the main my main vhdl file as follows: rrcfilter_inst : component RRCfilter port map( clk => clk, reset_n => '1', coeff_in_clk => '0', coeff_in_areset => '0', ast_sink_data => sink_data, ast_sink_ready => sink_ready, ast_sink_valid => '1', ast_sink_error => "00", ast_source_data => source_data, ast_source_ready => '1', ast_source_valid => source_valid, ast_source_error => source_error ); However I am not able to get any valid output when I simulate in modelsim. The clk runs at 400Mhz. The input samples sink_data come at 100 Mhz. Please someone help me out. VinayLink Copied
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