Generic Serial Flash Interface avalon wait request doesn't negate on 4-byte Quad SPI flash writes.

[ALMSlinger]

Hello,

I have targetted following reference design to my board - https://www.intel.com/content/www/us/en/docs/programmable/683419/22-1-20-1-1/flash-access-using-the.html

My board uses 10AX057H2F34E1HG device and Micron MT25QU512 device.

As shown in the user guide, the read_device_id{} command and read{} commands are successful.  But the  fourbyte_quad_input_fast_program { }  doesn't work.  I see in signaltap that avl_mem_waitrequest is never negated after the write command.  

What is missing?

Please help.

Thank you.

Best regards

[aikeu]

Hi ALMSlinger,

Are you referring to this document?

https://www.intel.com/content/www/us/en/docs/programmable/683419/21-2-20-1-1/program-flash.html

It seems that you are able to read but not able to write. Can test out any other method of write which can help to identify the problem.

Thanks.

Regards,

Aik Eu

[ALMSlinger]

Hello Aik,

Thank you for the response.  

Yes! I am referring to this program.  I tried both the functions shown on that page.  In both cases, the avalon wait request is never negated again.

Thank you.

Best regards,

Sanjay

[aikeu]

Hi ALMSlinger,

Any follow up from the previous comment?

Thanks.

Regards,

Aik Eu

[aikeu]

Hi ALMSlinger,

I will close this thread if no further question.

Thanks.

Regards,

Aik Eu

[ALMSlinger]

I responded to your question.  You haven't answered.

[aikeu]

Hi ALMSlinger,

Sorry that I misunderstood your previous respond.

I was thinking is it only a write and not read issue if you can run the Read from memory flash ?

https://www.intel.com/content/www/us/en/docs/programmable/683419/21-2-20-1-1/read-memory-from-the-flash.html

Can try to perform write enable operation for the flash first before a write operation.

https://www.intel.com/content/www/us/en/docs/programmable/683419/21-2-20-1-1/flash-operations-that-require-operation-code.html

Can share if there is any errors info logs.

Thanks.

Regards,

Aik Eu

[ALMSlinger]

Hello Aik,

You can close this case.  I found a better example accidentally... feel lucky.  https://www.intel.com/content/www/us/en/design-example/714766/arria-10-intel-fpga-remote-system-update-via-pci-express.html 

Thank you.
Best regards,

[aikeu]

Hi ALMSlinger,

Glad that the issue has been resolved on your side.

May I know the what may be the root casue for this issue?

Anyway I will close this thread soon.

Thanks.

Regards,

Aik Eu

[ALMSlinger]

Actually, the problem has not been resolved.  To be honest, it is most frustrating to deal with Intel FPGA tools... the documentation is so scattered all over the place and in this particular case, the scripts in system console just don't work.   I moved to another reference design that I just happened to stumble upon on Intel's website.  My hope is that the driver code that comes with the reference design will help me move further along.

Thanks for the interest.

[aikeu]

Hi ALMSlinger,

Sorry for the inconvenience. I will take note on your feedback.

At the mean time, I will close this thread for now. Do consider open a thread if there is further question.

Thanks.

Regards,

Aik Eu