How can I use Cyclone 10GX LVDS SERDES IP without PLL?

[silenfax]

Hello, I setup LVDS SERDES IP with external PLL. Can I clocking ext_fclk, ext_loaden, ext_coreclock directly without external PLL?

[EngWei_O_Intel]

Hi there

Nope. If you are setting the LVDS to external PLL mode, you need to connect necessary pins from IOPLL to those pins, else Quartus will be flagging error. You can refer the connection from:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/archives/ug_altera_lvds-19-1.pdf

Thanks.

Eng Wei

[silenfax]

Thank you!