How to set TSE PHY address

[Altera_Forum]

Hi all, 

 From altera "triple speed Ethernet user guide", I should be able set mdio_addr0 register to PHY device 0 address and mdio_addr1 register to PHY device 1 address, and then map MDIO registers for PHY device 0 to MAC register 0x200 ~ 0x27C, and map MDIO registers for PHY device 1 to MAC register 0x280 ~ 0x2FC.   My question is, how can I know the PHY address of my PHY device 0? If I have only one PHY (cyclone III board, Marvell 88E1111 PHY), is the PHY address is 0 by default (then I can write 0x0 to MAC register mdio_addr0)?  Thanks!

[Altera_Forum]

The PHY address is usually set by connecting pins of the PHY to ground or vcc. The hardware design of the board should tell you what the PHY address is. 

Alternatively you can try to guess the PHY address, by starting at 0 and increasing it until you get an answer. This is what the Altera TSE driver is doing. It doesn't take a long time, as there are only 32 addresses.

[Altera_Forum]

I understand now, thanks!

[Altera_Forum]

Daxiwen, 

 For Arria II GX board, can you please tell me how to get the PHY address of the Marvell 88E1111 PHY Device? To access the Marvell PHY, can you please advice what should we do usually as I do not have experience in doing this.  Thanks --Carid 

[Altera_Forum]

You should be able to guess it from the schematic, because it is hard wired. 

The other method is the one used in the Altera TSE driver for the Interniche stack, which is to try all the addresses until you get an answer. You only have 31 to try so it doesn't take that long. Have a look at the driver source code to see how the PHY is handled.