FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6359 Discussions

Is it possible to skip the generation of cosimulation support in the Intel HLS Compiler?

mnazemi
Beginner
572 Views

I was wondering if it is possible to only generate Verilog files.

0 Kudos
2 Replies
mnazemi
Beginner
317 Views

--simulator none

0 Kudos
KhaiChein_Y_Intel
317 Views

Hi,

 

Yes. you may use ‑‑simulator none.

You may refer to https://www.intel.com/content/www/us/en/programmable/documentation/ewa1462824960255.html Table1, 2 and 3 for other command options.

 

Thanks.

0 Kudos
Reply