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I want to make JESD204 interface for using LTC2274 AD converter.
But I don't know which mega function to be use. Teach me how and which megafunction to be use or IP for JESD204. Thank you.Link Copied
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You can use the JESD204 megafunction, available in Quartus 14.0 and on. Mind you, you will have to pay for it (about $10K I think), and you will need to understand the appallingly written User Guide. There is an example, but it is in Verilog or VHDL only, and understanding the linkage is difficult. A proper block diagram (not the generalised one in the UG) or capture of a Qsys block diagram would have been much better.
All the same, it is now available.- Mark as New
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Refer to JESD204b User Guide for the design steps at http://www.altera.com/literature/ug/ug_jesd204b.pdf
Some JESD204B example designs are available at http://www.altera.com/technology/high_speed/protocols/jesd204b/je-ref-designs.html- Mark as New
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Is JESD204 IP free or i need pay it ?
Jan Naceradsky- Mark as New
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@naceradsky read the second post of this thread...
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Really JESD204 Ip core cost 10 000$ ?
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Hmm, it is strange.
Xilinx has ip license which cost 1400$ http://www.digikey.com/product-detail/en/efr-di-jesd204-site/efr-di-jesd204-site-nd/4037869- Mark as New
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It seems, that better is use the A/D converter with serial LVDS. But on datasheet
https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/ug/ug_altlvds.pdf i read on page 3, that i need some license too. Is it true ? In datasheet https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/ug/ug_altera_lvds.pdf is nothing about license.... How is it ?:) Jan- Mark as New
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Page 3 is just a generic section they put in all of the IP cores. AFAIK the LVDS megafunction is free.
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