- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello,
I am new to FPGA/VHDL and I am trying to generate a sine wave using the Altera NCO IP Core. I have instantiated the IP component and I am using the test bench generated. When I try and simulate the design using modelsim I get numerous errors similar to the one below: Error(suppressible): (Vsim-10000) nofile(39): unresolved defparam reference to 'acc' in acc.lpm direction. Time : 0 ps iteration: 0 instance: /sine_ip_core/uo/nco_ii_0/ux000 File: nofile. Does anyone have any suggestions to solving this issue? Any help would be appreciated. Kind regards- Tags:
- simulation
- Vhdl
Link Copied
4 Replies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
1.Are using tcl scripts for setting up model-sim? I have tried to simulate it is working. with the help of tcl script generated and few comments. Can you share the screen short of the error. Attached model-sim transcript log file for reference. Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation)- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Thanks for your response.
I am simulating by setting the test bench file in Alteras simulation settings and then clicking Tools -> Run Simulation Tool -> RTL simulation. This prompts modelsim and then I get the following errors: https://www.alteraforum.com/forum/attachment.php?attachmentid=14621 I have not encountered using TCL scripts to simulate as of yet... Kind regards- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
The NCO core files are encrypted and can't be used by Modelsim. You need to generate a dedicated simulation model and - as I guess - import it manually in your simulation project.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
--- Quote Start --- Thanks for your response. I am simulating by setting the test bench file in Alteras simulation settings and then clicking Tools -> Run Simulation Tool -> RTL simulation. This prompts modelsim and then I get the following errors: https://www.alteraforum.com/forum/attachment.php?attachmentid=14621 I have not encountered using TCL scripts to simulate as of yet... Kind regards --- Quote End --- Hi, 1.While generating system(NCO), have you enable simulation? So that you can use scrip for loading the libraries which is easy to do. Refer the doc for steps: Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation)
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page