FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6359 Discussions

Problems with the csc and chroma resample

Altera_Forum
Honored Contributor II
918 Views

Hi, 

I have a project structure is as follows: 

cvi(rgb 24bit)->csc(ycbcr 444)->chroma resample(ycbcr 422)->cvo. 

input and output resolution 1920*1080p60 ,now cvo underflowed. 

I change cvo fifo to 1920*5 ,cvo remain underflowed.How can I do? 

Thanks
0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
202 Views

hi do you solve the problem ,I also meet the same one!

0 Kudos
Reply