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Hi there! I've been fiddling around with the Quad Video Mosaic (http://www.bitec.ltd.uk/hsmc_qvideo_mosaic_ref_design_vdk.pdf) example and comparing the latency of the video to the VIP Example Design. And I have some questions to the experts ;)
1. When using the Clocked Video Input and generating the code from SOPC the VHDL-file is empty, so I wonder if the "interface-code" is done in C? 2. In the user-guide of the Quad Video it clearly says the video-input is downscaled to QVGA size in the "Bitec Qvideo in IP core" / video_*.v, but can someone please tell me where in the code this is done? Because I want to keep the input resolution. Thank you all in advance!링크가 복사됨
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Hi;
have you used the DVI Bitec card, I want to execute the pass through. Do you have any idea ? thanks- 신규로 표시
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Hi ,
I am not sure but you can find some code from Altera for the DVI and also Quad Video settings in the location you installed the Altera tool.I give you the path of the files.Here there is code of CVI and CVO components. C:\altera\10.0sp1\ip\altera\clocked_video_input\src_hdl Check it .May help