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Quartus Lite Schematic Primitive included test

BillM256
New Contributor I
678 Views

Hello,

I’m designing a system using primarily primitives from the Quartus Lite Schematic and Block Editor. To clean up the schematics, I’d like to eliminate labels and instance info included with every instance of these primitives. E.g., I don’t need to be informed instance by instance that the primitive is an And2 or a DFF; these just clutter my design. I also don’t need input and output pins to be tagged as such. And it would be nice if I could size I/O pin labels and right or left justify them. Is there a way to do these things?

Thanks in advance,

 

Bill McDonald

0 Kudos
11 Replies
RichardTanSY_Intel
641 Views

Hi @BillM256 

 

I don't think there is an option to removed the labels and instance info. There no way to hide them as well. 

You may flip vertical/horizontal or rotate the pin as you see fit. 

I would recommend most of the users to use HDL for their design as their design getting complex. 

 

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos. 

 

 

BillM256
New Contributor I
628 Views

Hi Richard,

Thanks for the input. It's discouraging, but I'm not surprised as I've spent some time unsuccessfully trying to find the answer. It's also surprising since this text, and also lines surrounding elements, very much clutter a schematic and force unnecessary vertical spacing. Maybe there's a good reason for insisting that they be visible, but I don't see it. Seems lots of people would like to have a way to hide them.

As to HDL: I'm increasingly seeing the advantages. However, for this project, I'm resurrecting a '60s vintage Univac computer and trying to stay pretty close to the original.

Thanks again and best regards,

Bill McDonald

RichardTanSY_Intel
624 Views

Hi @BillM256 

 

Thank for the feedback. I could help to file an enhancement request to the engineering team such that we could have an option or a way to hide it. 

I may need some info to convince the team prior filing a request. 

Could you help to provide a description and share some screenshot on what you are currently seeing and what would you like it to be at the end (you may edit in paint or other editing software). 

Kindly help to provide a justification on why this is feature is needed and how it can helps you with. 

Information required: 

1. Description

  • Include current situation, and desired situation.
  • Include as much diagram as possible.

2. Business Justification

 

Thank you. 

 

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos. 

BillM256
New Contributor I
609 Views

Thanks Richard, I appreciate your interest in this.

I'll reply tomorrow, or soon after, with description and justification, etc. To the extent you think this is an issue for Intel, I'd be happy to exchange edits with you to build a compelling case. 

Also, yours is the only response I've gotten so far; maybe no one else cares. If that's true, we don't have a business-case to make. I doubt that's the situation, so maybe there's a way to post this that will get more attention(?). I'd think a lot of user-support for this change would be the most convincing for Intel.

Thanks and Best,

Bill

BillM256
New Contributor I
529 Views

Hi Richard,

Enhancement Request: 

1. Description: I think our message stream above explains it as well as I know how. The attachment below shows the clutter, including the dotted boxes surrounding elements of the schematic, I'm complaining about.

2. Business Justification: Competitive advantage, customer satisfaction, etc.

 

 

sstrell
Honored Contributor III
515 Views

These are good ideas to clean it up, but the schematic editor in Quartus hasn't been touched in years.  I wouldn't hold my breath on this, TBH.

BillM256
New Contributor I
511 Views

Yeah, I'm not. But Richard was kind enough to reply and asked for the input. 

The editor is excellent in some respects and clumsy and buggy in others. Not surprised to hear it's an orphan, shows all the signs.

I'm coming to appreciate how powerful HDL is and why the editor probably isn't used much. Unfortunately, for my current project HDL isn't the right approach for the most part.

Thanks as always,

Bill

sstrell
Honored Contributor III
506 Views

Note that you can convert any HDL code into a symbol file (.bsf) to put in a schematic (though you can only do this in Standard edition; no conversion option in Pro).

BillM256
New Contributor I
501 Views

Yes, thanks. Aware and filed in back of mind but haven't looked into yet. Just trying to figure out where to focus is pretty overwhelming at my current stage.

Sort of along those lines, I was thinking the LPM_FF might be very helpful, but I need ASET on a bus and can't figure out how to do that. I thought I could modify the Verilog file; older videos show a MegaWizard that at least allows specification of an HDL, which hopefully implies that file would then be available for editing. But Quartus currently shows no sign of still having the Wizard, and I haven't found another approach that provies a .v. I tried converting the FF symbol to a Verilog file, but just get a blank, i.e., stubbed out, .v.

sstrell
Honored Contributor III
492 Views

ASET = asynchronous set? Asynchronous load?

always @(posedge clk, posedge aload)
	if (aload)
		q <= adata; //could be 1'b1 if you just want to set
	else q <= d;

 

BillM256
New Contributor I
484 Views

Yes, async set.

Issue is I have 1 push button momentary contact per register FF. The LPM_FF has bussed D and Clk, which is fine, but it has only individual ASET, which I interpret to mean all FFs are wired to a single input, which obviously won't work for multiple individual buttons. That's why I was hoping to figure a way to hook a bus to ASET.

Many thanks for the code example. If I could figure out how to get to the Verilog file for the LPM_FF, I could do something like that.

Regardless, I haven't put nearly enough into this to reasonably ask for help. And the LPM_FF is only nice to have;  using discrete Primitive D FFs is plenty adequate. The LPM approach is just my trying for a more efficient, elegant solution. I.e., I'm not stuck.

Many thanks and my best,

Bill

 

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