Two sustom avl mm master to ddr3 uniphy controller

[Altera_Forum]

First I have created a custom avl mm master to DDR3 Uniphy controller slave, connected it to DDR3 controller along with pll in QSYS and using that I have perform Write read operations in the DDR3 memory module (MT41J128M16HA). 

Now I created a second master for the same slave which will only read from DDR3 memory module and connected in the QSYS. The system was generated and compiled. After that I found the avl_waitrequest of the ddr3_controller is not going low ie 1'b0 after the initialization and calibration of memory module.  So the Questions are 1) Can I connect two custom masters of DDR3 Uniphy controller memory mapped slave? 2) If Yes then where I am going wrong ? since avl_waitrequest is not going low and I can not perform write or read operations from memory? 3) Is there any specific way so that I can connect two master to one avl_mm_slave like using some kind of multiplexer or like that? 4) Why my two master one slave system is not working ?

[Altera_Forum]

waitrequest is only valid when an operation is going on, so you shouldn't read it before doing a read or write operation. Did you try to perform a read or write operation anyway?

[Altera_Forum]

--- Quote Start ---  waitrequest is only valid when an operation is going on, so you shouldn't read it before doing a read or write operation. Did you try to perform a read or write operation anyway?  --- Quote End ---   I checked waitrequest == 1'b0 before writing the first data into the memory and then keep checking it before any read or write. This method I have used when single master is connected to ddr3 controller and it worked well. I was able to write into memory then I read the written data modified it and written it back into the memory.  Now I want to read this modified data with second master (This master will only read it wont write anything into memory). Can I do it?

[Altera_Forum]

This is not how it works. The Avalon specification clearly states that waitrequest is only valid during an operation. Do your read or write operation first, and check waitrequest afterwards. As long as it is 1 then your operation isn't finished and you should wait. 

If you do it that way then yes you can have several masters connected to the same slave.

[Altera_Forum]

--- Quote Start ---  This is not how it works. The Avalon specification clearly states that waitrequest is only valid during an operation. Do your read or write operation first, and check waitrequest afterwards. As long as it is 1 then your operation isn't finished and you should wait. If you do it that way then yes you can have several masters connected to the same slave.  --- Quote End ---   Thanks for your reply. I will implement my masters as you have suggested and will let you know the results. I have one more doubt that is If I dont check waitrequest first them how come I will know that memory initialization and calibration is done? Because there is no such signal to avl_mm_slave which will let me know that memory initialization is done. And also please let me know when to start writting to DDR3 memory? Right now I am using "local_init_done" as indication to start writing into memory OR I am just waiting for 1000000 clock cycles and then I starts writing into the memory. which one is the good way? Or Is there any other way so that I will come to know that now is time to start writing into the memory?

[Altera_Forum]

I don't use that controller so I can't answer for sure but I think that you can just start doing an operation right away. If the controller is calibrating, it will just pause your component by holding waitrequest until it is ready to process it.

[Altera_Forum]

--- Quote Start ---  I don't use that controller so I can't answer for sure but I think that you can just start doing an operation right away. If the controller is calibrating, it will just pause your component by holding waitrequest until it is ready to process it.  --- Quote End ---   Thanks Daixiwen, I will just check with it whether it works like you said or I will prefer the the initial delay method to wait for initialization done and start writing.