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how to integrate SG-DMA into the PCIe Hard IP core with AVMM interface

rMa1
Beginner
355 Views

My design is using PCIe Hard IP core with AVMM-DMA interface, but the DMA descriptor length is  limited lower than 128, I want to use 256 or larger than 256,  how should I do?

Modular scatter-gather dma(in platform designer IP catalog) could select larger descriptor length, how to integrate SG-DMA into the PCIe Hard IP core with AVMM interface to resolve this problem, does I need open NIOS II to use the SG-DMA? 

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1 Solution
SengKok_L_Intel
Moderator
348 Views

Hi,


Yes, the descriptor controller supports up to 128 descriptors, and this is unable to change to a larger number. Regarding to the modular SG-DMA, this is not necessary to use NIOS to configure. You can use any of the AVMM interfaces to configure the modular SG-DMA, for example, PCIe BAR.


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4 Replies
SengKok_L_Intel
Moderator
349 Views

Hi,


Yes, the descriptor controller supports up to 128 descriptors, and this is unable to change to a larger number. Regarding to the modular SG-DMA, this is not necessary to use NIOS to configure. You can use any of the AVMM interfaces to configure the modular SG-DMA, for example, PCIe BAR.


rMa1
Beginner
340 Views

Thanks SengKok.

Does there have the example design for PCIe hard core with AVMM interface using external DMA? if yes, I could replace the normal DMA to SGDMA for the fast testing. 

 

SengKok_L_Intel
Moderator
333 Views

I have checked with the team, unfortunately, there is no such example available. Thanks.


SengKok_L_Intel
Moderator
319 Views

If further support is needed in this thread, please post a response within 15 days. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions. 


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