Hi,I'm using Quartus 9 on a stratix II FPGA. On the system i have a nios 2 processor. I'd like to have a FIFO from the FPGA to the Nios, but using SOPC builder, i don't see an "easy way" to do this. Is there any IP that allow what i'm searching for ? Or should do i have to create a system manually ? Thx in advance :)
This https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/ug/ug_embedded_ip.pdf shows: "Avalon-ST Single-Clock and Dual-Clock FIFO Cores" but I think this is for the latest Quartus.Hope that helps.
I know it is possible with Qsys, but in this case, the system is made with SOPC builder, and i don't know how to export some connections on the FPGA side :/
Sorry about that - yes, you're right SOPC Builder won't let you do that. Skimming the SOPC Builder User Guide (https://www.altera.com/en_us/pdfs/literature/ug/ug_sopc_builder.pdf) it looks like the expectation is that you would then implement a dummy component to convert the Avalon-ST to a Conduit in order to get the wires in the top level export. While it's a trivial module to implement, it's certainly inconvenient.So the answer to your original question is: no, there is no existing SOPC Builder IP and yes you need to create your own component to do this. (or, update your tools to Qsys)