.qip and .sip generated files manually added to project . On compile entities in .qip not found. Before I start cutting and pasting modules into existing.v files, what's proper way to incorporate these PLLs? Details of transcript warnings below.

[LCard2]

Warning (20013): Ignored 16 assignments for entity "IPpll" -- entity does not exist in design

 Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_NAME altera_pll -entity IPpll -sip IPpll.sip -library lib_IPpll was ignored

 Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_VERSION 18.1 -entity IPpll -sip IPpll.sip -library lib_IPpll was ignored

 Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_ENV mwpim -entity IPpll -sip IPpll.sip -library lib_IPpll was ignored

Warning (20013): Ignored 317 assignments for entity "IPpll_0002" -- entity does not exist in design

Warning (20013): Ignored 16 assignments for entity "unnamed" -- entity does not exist in design

Warning (20013): Ignored 14 assignments for entity "unnamed_altclkctrl_0" -- entity does not exist in design

[sstrell]

"Entity does not exist in design" indicates that you added the IP files to the project but didn't instantiate the PLL in your actual design. Did you instantiate the PLL in your RTL code?

[LCard2]

Have built msim_setup.tcl with command lines in sopc_builder with ip-make-simscrpt. Can't find procedures to get these files to incorporate appropriate PLLs in "work" directory with HDL ... getting "failed to run ip-make-simscript" invoking modelsim from quartus...

[Vicky1]

Hi Len, Have you tried the solution provided in previous post? which quartus edition & version are you using? As suggested in previous post, try to instantiate the IPpll(entity/module) from IPpll.v or IPpll.vhd file in top level design file & then compile. Please let me know if you have any concern. Regards, Vikas

[LCard2]

Hi Vikas, Working on previous solution, not running yet. From IP Platform, I have generated one input ref clock and 5 PLL output clocks. I can compile with the generated “IPpll.v” instantiated in my top level ----.v file, ; there are 2 more generated ,” ipPLL_002.v” and “ipPLL_inst.v”. If I instatiate a line in top level entity “ipPLL ipPLL_inst”, it will compile. Still cannot invoke ModelSim from Quartus : “Internal error: Failed to run ip-make-simscript: <some unrecognized swirches>….” I have command-line run the ip-make-simscript and included the msim_setup.tcl file in project. Len

[Vicky1]

Hi Len,

Have you linked the ModelSim in Quartus?

what are you using NativeLink/Testbench/Script for simulation?

You ca set the path like below,

'Tool' -> 'Options' -> 'EDA Tool Options' ..

C:\intelFPGA\17.1\modelsim_ase\win32aloem

Regards,

Vikas

[LCard2]

Hi Vikas, Yes, path set in EDA Tool Options, it has connected before, just not with iP files in project. Some detailed clear instructions on getting iP into the design and simulating would be helpful. Len

[Vicky1]

Hi Len, Could please follow the steps provided in Simulation Quick-Start for ModelSim - Intel FPGA Edition for Intel Quartus Prime Pro Edition? https://www.intel.com/content/www/us/en/programmable/documentation/yur1496247032051.html Refer the Video as well, https://www.intel.com/content/dam/altera-www/global/en_US/video/modelsim-with-quartus-prime-pro.mp4 I hope this will help to resolve the issue. Regards, Vikas

[LCard2]

Using Quartus Prime Standard—are steps the same?

[LCard2]

Please point me to steps to take to get IP instantiated, compiled, and run in simulator. As you see, the Quartus Prime Standard has no “Generate Simulator Setup Script” tool. Thank you. Len Cardillo eMagin [cid:image001.png@01D4BEB5.A7D9E4E0]

[Vicky1]

Hi Len, Please provide below details, 1. Quartus Edition & version used 2. specific PLL IP 3. specific Modelsim (Altera or Intel & License or free) here you need to instantiate the IP from generated HDL file of IP in top level design. For simulation refer the below link, https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_gs_msa_qii.pdf Regards, Vikas

[LCard2]

Hi Vicky, 1.) Quartus Prime Version 18.1.0 build 625 09/12/2018 SJ Standard Edition 2.) Used IP Install Catalog (which has subsequently become inoperative) to generate a reference clock and 5 PLL output clocks. Files attached. 3.) ModelSim Free version 105.b I have seen that there is no Generate Simuator Setup Script in the Quartus standard – I used the command line “ip-make-simscript” to generate mentor/modelsim_setup.tcl. I set parameters in Msimsetup.do . Attached – note underscore deleted. It is in C:/Steamboat/_Active Probe Card/FPGA/mentor Now I think it’s a matter of setting the correct paths. I have copied all necessary .v files into C:/Steamboat/_Active Probe Card/FPGA. I am not launching the simulator from the IP script location.. what do you suggest? How would I set a path? Or should I move everything into location where simulator is launched? Thank you. Len

[Vicky1]

Hi Len, 1.Go to Processing -> start -> start testbench writer. 2.Check the meassge window : Info (201000): Generated Verilog Test Bench File C:/progm/plltop/simulation/modelsim/pll.vt for simulation 3.check the path & open the .vt file & copy the module name(like : pll_vlg_tst ) 4.Follow the steps '1.2. Specify EDA Tool Settings'onwords from attached link & use testbench name 'pll_vlg_tst' instead of testbench_1 & browse the .vt file. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_gs_msa_qii.pdf 5. Eventually, when you perform 'Click Tools ➤ Run Simulation Tool ➤ RTL Simulation ' it will take time to open modelsim. please let me know if you have any different concern. Regards, Vikas