FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6223 Discussions

some other question for Modular SGDMA.

Honored Contributor II

When I want to use Modular SGDMA,I encounter some questions for Modular SGDMA. 

1>Stride Width: Value 0 means fixed address access,But in GUI,there is no "0" option.From the source file,it seems that "1" in GUI means that fixed address. 

2>Burst Write:If fixed address is enabled in Write Master,the burst Write operation is disabled.If I want to connect write master to PCIe IP WITHOUT Burst operaion,the effieneicy would be lower so much?
0 Kudos
0 Replies