FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
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HPS Freeze when Writing DDR4

Honored Contributor II


I am using a ReFLEX Achilles Dev Kit that has two DDR4 memories. I have them both connected to the HPS. The first one is connected to the emif port of the HPS and the second one is connected to the HPS2FPGA bridge with an address span extender in QSYS. I am running Linux on the HPS and I am using mmap to write and read from memory mapped locations. It seems to work correctly... I read whatever I write into the memory location and if I write the address span extender control register and read, it is a different value. However, after I was satisfied with this, I tried to add various parallel I/O to connect to my FX3 USB and LCD screen that is connected to the lightweight HPS 2 FPGA bridge. When I added these, the HPS will usually freeze when I try to read the HPS2FPGA bridge connected DDR4 memory. Usually the read works, but sometimes the system will freeze up too. By freeze I mean it is no longer echoing my serial inputs back to my console and also if I have an SSH connection up, it usually disconnects. I assume from these occurrences that the HPS is frozen. Writes always make the HPS freeze.  

I am fairly new to developing on a SoC system and Linux in general. Any feedback or tips would be helpful to me. Currently, I am trying to debug with DS-5, but I need to get an ultimate license for it I believe. One other thing is that I receive a "DDR timing not met" in my Quartus messages. Would timing cause the HPS to freeze if it cannot access the DDR4 through the bridge? I am still learning about timing quest and still not sure how to fix timing problems or find timing problems.  


Thank you
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