How To Simulate Example Designs

[th_fpga_2022]

Hi guys,

I have recently bought Intel Stratix 10 MX FPGA Development Kit.

The official link is included here:

https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/stratix/10-mx.html

I want to learn about DDR[4] DIMM design and testing.

I can see that there is a package for an example design, from the link above.

May I ask if anybody knows if there is any good user guide and/or documentation on how to setup and run simulation for the included example design.

Thanks,

Have a nice day,

TH

[sstrell]

The EMIF IP user guide goes through how to perform a simulation: 

https://www.intel.com/content/www/us/en/docs/programmable/683741/21-3-19-2-4/simulation-options.html

[th_fpga_2022]

Hi,

I tried to follow the following document:

https://www.intel.com/content/www/us/en/docs/programmable/683741/21-3-19-2-4/simulation-options.html

BUT its NOT very clear-cut. And I failed to setup simulation. BUT I will try again. However, in the mean time ...

May I ask if anybody has a step-by-step tutorial on how to set up simulation using one of the supported simulators in Intel Quartus Prime Pro Edition 22.1 please ?? The board is Intel Stratix 10 MX FPGA Development Kit.

Or at least, could anybody point me to the right files and/or sections please ??

Sincerely,

Have a nice day,

TH

[AdzimZM_Intel]

Hi TH,

You can generate and simulate the Design Example by following the User Guide from this link:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-20120.pdf

Kindly let me know if you're facing any problem when creating and simulating the design.

Regards,

Adzim

[th_fpga_2022]

Hi AdzimZM_Intel,

Sorry about this late reply. I have been busy lately.

Anyway, I have recently found a way to load and run simulation on an example design (Quartus_Pro_PLL_RAM.zip) that came with the following quick-start guide:

https://www.intel.com/content/www/us/en/docs/programmable/691278/21-3/quick-start.html

Thank you for that.

On the same topic,

I have bought and been trying to find a way to simulate one of the example designs that came with Intel Stratix 10 MX FPGA Development Kit.

The link is:

https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/stratix/10-mx.html

But I could NOT find where the top-level test bench would be for the design (i.e. qts_rdimm_ddr4_x8_x72_1333MHz).

May I ask if I would have to come up with the top-level test bench myself ??

Or would there be a test bench already written somewhere (i.e. provided by the vendor) ??

Thank you,

Have a nice day,

TH

[AdzimZM_Intel]

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.