How can you use multiple instantiations of the same partition and synthesis qdb file?

[DBay]

I have a project that consists of many levels of partitions/subprojects. I then try to instantiate multiple copies of this large project(about 1/4 of the device), but it fails saying that I am trying to put the multiple copies of the partition in the same location. All of my qdb files have been synthesis only- not final. There are no examples of multiple instantiations. Is it even possible anymore? It used to be back in quartus14 and before.

[KhaiChein_Y_Intel]

Hi,

Could you upgrade to the newer version of the software and see if the problem persists? Could you share the error message?

Thanks.

[DBay]

No, unless I can be assured that there is a real fix for this issue, I can't afford to upgrade. Based on previous experiences, it can take years to fix a problem like this.

Error(18781): Deterministic overuse of FF resources in region (96, 183) to (120, 199)

   Info(11579): Estimated usage is 6948 resource(s).

Error(16297): An error has occurred while trying to initialize the plan stage.

This is the last setup. I had just the two partitions imported with no LL regions specified for the partitions yet. I think it was a similar error when I made LL regions for each partition that was imported. Each of these partitions probably had a dozen partitions within them in a hierarchical format from several projects deep.

[KhaiChein_Y_Intel]

Hi,

This error indicates that there are not enough available resources of the specified type in the region to satisfy the design requirements. Reduce the number of resources required by the design in the specified region - e.g. select a larger region or apply different region constraints to relevant components of the design.

Do you have any LL regions set in both the designs?

Thanks.

[DBay]

The partition that I'm trying to place twice is only a synthesis qdb. It takes up less than1/4 of the chip. I should be able to place 3-4 of these in the chip, I'm only trying two right now. As I said, I have no LL regions in this upper level. The lower levels have many LL regions and partitions of course. So, this should be able to place these partitions where ever it needs to, since I don't tell it.

However, like I first said, it tries to place them both in the same spot. Even when I create two separate LL regions for these imported QDB files, that are plenty big enough to hold each partition, it still tries to place them on top of each other.

I have done 2 instantiations of the same partition in a lower level project. The only way I achieved that was to not have any partitions or LL regions in those duplicated partitions. That is not an option when I'm looking at this large of a project.

I am trying a flat project that only has one project, but that is taking a lot of time to merge all these lower level projects and IP cores into one big project. I shouldn't have to do this. It used to work in older versions.

[sstrell]

"The lower levels have many LL regions and partitions of course. "

If you have LL regions in the lower levels, that's going to force the placement of them when you try to instantiate more than once a partition that contains them (in the same spot, as you say).

You can have separate LL regions in the top level, but you don't want to have, essentially, child regions forcing the placement of that lower-level logic. As you discovered, not having those lower level regions did allow the partitions to be placed.

It might be worthwhile to try creating the top level with the source code itself, instantiated multiple times, instead of trying to reuse the design block (.qdb), and not using any LL regions to give the Fitter the most flexibility for placement. You would need to compile the entire project from scratch, but there's a better chance everything will fit.

Exported synthesis partitions are a bit more restrictive now than they were back when you used the old incremental compilation feature in 14.0. Try a flat compile without reuse and see how it works.

#iwork4intel

[DBay]

If you export the output of the synthesis step, then you shouldn't have the locations. But your right that apparently there is a bug that the placement is still exported in the syth step. When are you fixing this bug?

How are you supposed to use the lower partitions with multiple people? It sounds like your saying that the pro version doesn't support smaller projects as part of a larger project. If I just combine everything into one big flat project, then only one person can work on this and it is really a pain to write and debug.

I am trying to make a flat version, but there is some problem that it removes 95% of my design when it starts to place. It is all there in synthesis, but gone in place and route. There may have been some unseen error in copying the IP from all of the smaller projects to the big one. Probably 30+ individual IPs that I just copied into the flat project.

It is really disappointing that after years of being light years ahead of Xilinx, you have backtracked to be no better than quartus 9. That was a horrible release full of bugs and LL and partitions didn't work at all. Now, somehow, Vivado is better than quartus in partitions and reuse. The 2-4x improvement in processing time Quartus used to have over Vivado is now gone. Quartus crashes all the time now if there is anything at all complex. Very disappointing.......

[DBay]

It looks like if you delete all LL regions and just use partitions in projects, it will instantiate multiple copies of the same partition hierarchy. I guess your just not supposed to use LL regions anymore. Too bad, this used to be a very good tool and placed Quartus way ahead of Vivado. Now, I guess they are just about equal. Very disappointing. Hopefully they will fix this problem and get incremental compiling to be effective again and allow you to group functions in a given area to force the place and route to be faster and more effective.

[KhaiChein_Y_Intel]

Hi,

What is the snapshot settings for the lower region?

Thanks.

[DBay]

They are all synthesis only. Using final doesn't work at all to export to a higher hierarchy, regardless of how many levels.

[KhaiChein_Y_Intel]

Hi,

Can you provide both the designs where the partition is exportred from and imported to, and the steps to reproduce the error?

Thanks.

[KhaiChein_Y_Intel]

Hi,

May I know if you have any updates?

Thanks.

[DBay]

Yes, it looks like LL regions are a thing of the past. When I don't use them at all at any level, then I can make hierarchical partitions that work. Maybe you should just remove them from the software if they shouldn't be used anymore.

Basically it looks like Quartus and Vivado are at the same level of reuse now. Shame.....

Dan

[KhaiChein_Y_Intel]

Hi,

It would be great if you could share the design and the steps to reproduce the error. If the error is reproducible, I can help to send a feedback to engineering.

Thanks.