FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
5344 Discussions

I have generated an example design for PCIe , which is targeted for Stratix 10 DX development kit. I tried the simulation on Modelsim PE edition with scripts generated by Quartus pro. Attached error of simulation. please help fix the issue.

VMR001
Beginner
292 Views

Attached snapshot of the error message reported by the modelsim pe edition tool.

 

0 Kudos
3 Replies
BoonT_Intel
Moderator
161 Views

Hello Sir,

I don't see any attachment in this thread.

May I know are you running the P-tile PCIe IP? For P-Tile, its only support for simulation using VCS simulator.

VMR001
Beginner
161 Views

Thank you for quick response. Yes we are using P-tile PCIe IP. Will there be support for Riviera or Modelsim/Questasim any time soon

BoonT_Intel
Moderator
161 Views

unfortunately, there is no plan to support for other simulator.

Reply