Inquiries regarding 10M08 Evaluation Kit FPGA (How to use inner clock&error message)

[CircuitMaster]

 

1) I've created a histogram circuit with the 10M08 Evaluation Kit FPGA. I want to test it, but I can't find detailed instructions on how to do it. If there's any resource available, please let me know.

2) In addition, I'm having trouble using the built-in clock. I've been trying to follow along with other YouTube tutorials, but when I go to the IP Altera-In-System Sources & Probes window, I get an error: 'Component altera_in_system_sources_probes 22.1 not found or could not be instantiated.'

If you know how to resolve this error or where I can download the corresponding file separately, please let me know. I'm currently using Quartus Prime Lite.

Thank you.

[ShengN_Intel]

Hi,

For Question 2: Try to replace with a new In-System Sources & Probes IP (ISSP) in platform designer (QSYS) check screenshot below.

Thanks,

Sheng

[CircuitMaster]

Can you tell me about where I can access download the new ISSP??

[sstrell]

You're looking in the Quartus IP Catalog, not the Platform Designer IP Catalog, though it should be available in both.  Bad installation of Quartus perhaps?

[ShengN_Intel]

For question 1, do you mean that you want to test it with rtl simulation or on-chip debug tool?

Thanks,

Best Regards,

Sheng

[CircuitMaster]

I mean on-chip debug tool, thank you

[ShengN_Intel]

Hi,

Do you see the ISSP IP after re-installation? By right ISSP IP should be there.

[ShengN_Intel]

Hi,

Do you have any further concern or consideration on this thread?

Thanks,

Best Regards,

Sheng