Hi Intel support team,
I'd like to know how many DDR4 interfaces Arria 10 devices can support.
In table 5 & 6 of the following website,
one resource is called "Hard Memory Controller" .
What's hard memory controller?
For example, GX160 supports 6 hard memory controllers, could I say GX160 support up to 6 DDR4 memory interfaces (include controller and PHY)?
Yes, you could potentially create up to 6 DDR4 memory interfaces though the interface widths would be limited by pin availability. Hard memory controllers are available in all the I/O banks of the device to provide flexibility for implementation. See this online training for an introduction to the memory interface architecture for these devices:
sstrell is correct.
In general, you can refer to below link to find out the support capability of each FPGA device