Intel® FPGA University Program
University Program Material, Education Boards, and Laboratory Exercises
1183 Discussions

Porting QSYS Project with a modified UART Core to be able to compile on a licensed server

HighBaudUartEnjoyer
933 Views

I am using the DE10-LITE FPGA to send a video stream from a camera to an ESP32 over UART for a university project. The maximum selectable baud rate of 115200bps on the AVALON UART IP CORE was severely limiting the FPS of my video feed so I went into the .tcl for the UART core and added a maximum selectable UART of baud 250000 bps which worked really well. The issue is that I need my final project to generate a .pof however my project uses "Frame Buffer" IP core which I only have an OpenCore Plus license for so I cannot compile a .pof with it in my project. I have access to a university computer which has the necessary licenses to compile a .pof but I cannot use my modified UART on there because I do not have permission to modify files in the Quartus root directory. The Quartus project we were given to build on top of generates from the .QSYS every time I compile so I cannot create the modified UART QSYS on my laptop and then move it to the licensed computer to compile because I get above maximum allowed baud rate errors on there when QSYS tries to regenerate the UART during compilation. Is there any way I could build the .QSYS once on my laptop and then only compile a .pof on the university computer without regenerating the QSYS system. Alternatively, could I get some sort of two to one USB type B adapter to blast the board with my working .sof and then take out the laptop usb while still maintaining power to the FPGA (my board has to be connected to a power supply on a rover which has a USB type B output going into the FPGA for the final project hence the need for .pof)

 

Appreciate any and all help,

Many thanks

Labels (1)
0 Kudos
3 Replies
SyafieqS
Employee
885 Views

 Is there any way I could build the .QSYS once on my laptop and then only compile a .pof on the university computer without regenerating the QSYS system.

  • I believe there is a disable button in setting for regenerating IP during compilation. You may try to disable it in licensed machine, load the modified design and compile with pof.

0 Kudos
SyafieqS
Employee
854 Views

Let me know if there is any update


0 Kudos
SyafieqS
Employee
835 Views

 As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to https://supporttickets.intel.com/, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution, give Kudos and rate 5/5 survey


0 Kudos
Reply