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Question for DE2 board LEDs

Altera_Forum
Honored Contributor II
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Hi there~ 

 

I'm going to control one 7 segment (HEX0) and 8 LEDs on DE2 board using  

 

Quartus2. But, I don't know how to make delay for each LED 

 

First of all, of the 7 segment pins, I use 6 of them to make# 1 and# 2. I think  

 

that it's pretty straightforward because when I press first push button, it will  

 

show# 1, and second push button is pressed,# 2 will show up.  

 

But 8 LEDs need to be delayed. As I said, I going to use two push button as  

 

input signals and each button stands for kind of selection.  

 

Ok! Here is a simple version. what I'm going to do is when I push first push  

 

button, the 7 segment will show# 1, and 8 LEDs start to turn on from the  

 

first LED to 8th LES at each second. Otherwise, when I press 2nd push 

 

button, 7 segment will show# 2 and LEDs need to turn on from 2nd led, 3rd  

 

led, 5th led, 6th led and 8 led. 

 

===================================================== 

USE IEEE.STD_LOGIC_1164.all; 

ENTITY AutomatedCarWash Is 

Port( 

KEY0, KEY1 :IN STD_LOGIC; 

LEDG0, LEDG1, LEDG2, LEDG3, LEDG4, LEDG5, LEDG6, LEDG7,  

HEX00, HEX01, HEX02, HEX03, HEX04, HEX06 :OUT STD_LOGIC); 

END AutomatedCarWash; 

ARCHITECTURE LEDs of AutomatedCarWash Is 

signal AND1, AND2, OR1: STD_LOGIC;  

BEGIN 

AND1 <= (KEY0 and (NOT KEY1)) after 1 NS; 

AND2 <= (KEY1 and (NOT KEY0)) after 1 NS; 

OR1 <= AND1 or AND2 after 1 NS; 

LEDG0 <= OR1 after 1 NS; 

LEDG1 <= OR1 after 1 NS; 

LEDG2 <= OR1 after 2 NS; 

LEDG3 <= OR1 after 3 NS; 

LEDG4 <= OR1 after 4 NS; 

LEDG5 <= OR1 after 5 NS; 

LEDG6 <= OR1 after 6 NS; 

LEDG7 <= OR1 after 7 NS; 

END LEDs; 

ARCHITECTURE SevenSegment of AutomatedCarWash Is 

Signal AND3, AND4, AND5: STD_LOGIC; 

BEGIN 

AND3 <= NOT KEY0 and NOT KEY1 after 1 NS; 

AND4 <= NOT KEY0 and KEY1 after 1 NS; 

AND5 <= KEY0 and NOT KEY1 after 1 NS; 

HEX00 <= AND5 after 1 NS; 

HEX01 <= NOT AND3 after 1 NS; 

HEX02 <= AND4 after 1 NS; 

HEX03 <= AND5 after 1 NS; 

HEX04 <= AND5 after 1 NS; 

HEX06 <= AND5 after 1 NS; 

END SevenSegment;
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Altera_Forum
Honored Contributor II
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In my opinion the after statement is just for simulation purposes. So everything you put into your vhdl-code in this example will take place simultanious. 

 

Try a different way to delay your code like usleep or built some kind of counter into the code, but this won't work like you try it right now. But sorry I haven't got a solution right away. Here is a link to an example, where I showed how to delay an led with a modulo-counter, but it is a block design just look into the attachment. http://www.alteraforum.com/forum/showpost.php?p=85568&postcount=6 

 

Good luck!
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