Cache L1 , L2 , L3 ?

[RBato]

what does L1 ( instruction , data ) , L2 , L3 mean ?

[jimdempseyatthecove]

https://en.wikipedia.org/wiki/Cache_memory

Jim Dempsey

[gaston-hillar]

Rafal,

The following article written by Chris Gottbrath a few years ago and published on Dr. Dobb's is very useful to understand processor caches. It was written before Intel launched the first Xeon Phi. However, it is still very useful. The following is the link: http://www.drdobbs.com/parallel/cache-friendly-code-solving-manycores-ne/240012736

[gaston-hillar]

Rafal,

Another article that you must read and is written by the same person that provided the first answer for your thread: Jim Dempsey (jimdempseytatthecove).

The article has a few years but it is a must read (short but useful article). Superscalar Programming with HyperThreading and Shared Cache Systems