Intel® ISA Extensions
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How to convert three 8-bit 1-channel images to a 24-bit three channels image using SSE

softwarebee
Beginner
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3 images before change
RR1R2Rn
GG1G2Gn
BB1B2Bn
image after change
RGB(R1,G1,B1,...,Rn,Gn,Bn);

Thank you in advance!
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7 Replies
Thomas_W_Intel
Employee
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I would go fora combination of pshufb andpblendvb (or _mm_shuffle_epi8 and_mm_blendv_epi8 if you are talking instrisics).

  1. You start loading 3 registers with the first 16 values of R, G, and B.
  2. pshufb with an appropiate mask can be used to move the values to the correct position, i.e.
    1. R1 to position 1, R2 to position 4, R3 to position7, R4 to position 10, R5 to position 13, R6 to position 16
    2. G1 to position 2, G2 to position5,G3 to position 8,and so on
    3. B1 to position 3, and so on
  3. Using pblendb, you can merge the results and store them
  4. The next 16 values are then G6,B6,R7,G7,B7,...,B14,G15, which will require different shuffle masks
  5. Finally you store the last 16 values after a similar scheme.

After processing these 16*3 values, the pattern repeats.

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neni
New Contributor II
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You can avoid the blendvb by using a proper masks on pshufb (which zero's the parts that are not needed on pshuf and than just or the 3 phsufb values)
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softwarebee
Beginner
601 Views
Thank you for your reply, I am a SSE newer, would you like to post a more exactly instructionAs far as I know there is not a pshufb in SSE,how to do it just using SSE?
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softwarebee
Beginner
601 Views
Thanks
Is it right to use the following mask?
1.
{0-1-11-1-12-1-13-1-1,4-1-1,5}
{-1,0-1-1,1-1-1,2-1-1,3-1-1,4-1-1}
{-1-1,0-1-1,1-1-1,2-1-1,3-1-1,4-1}
2.

{-1-1,6-1-1,7-1-1,8-1-1,9-1-1,10-1}

{5-1-16-1-17-1-18-1-1,9-1-1,10}

{-1,5-1-1,6-1-1,7-1-1,8-1-1,9-1-1}

3.

{-1,11-1-1,12-1-1,13-1-1,14-1-1,15-1-1}

{-1-1,11-1-1,12-1-1,13-1-1,14-1-1,15-1}

{10-1-111-1-112-1-113-1-1,14-1-1,15}

But how to do it just using the SSE instructions?
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Thomas_W_Intel
Employee
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pshufb is part of the Supplemental Streaming SIMD Extensions 3 (SSSE3), which are supported by all current Intel processors down to Core 2 Duo and Atom. If you want to support older hardware, the Intel C++ compiler provides the necessary framework for a dispatcher that executes an SSSE3 and a generic version. I don't see a way how you could work around pshufb.
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matthieu_darbois
New Contributor III
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Hi,

This has been done with SSE2 in the SSEPlus project which is released under the Apache License V2.0 but should be less efficient than SSSE3 on Intel Processors. It has the advantage to run on AMD processors where SSSE3 is not present.

Another way would be to use IPP but this might not be an option for you.

Regards,
Matthieu
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softwarebee
Beginner
601 Views
It is so difficult for me to learn these instructions, that I do not know how to start writing the program! Would you like to write the program exactly?
Thank you very much!
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