16 bit ripple counter

[wilfleth]

Is this a valid way to implement a 16 bit ripple counter with 4 bit ripple counters?

[BoonBengT_Altera]

Hi @wilfleth,

Thank you for posting in Intel community forum and hope all is well.

Would you be able to lets us know more details on what tools that you are using for the implementation?

As well as what kind of application you are looking for to implement the ripple counter? Is rtL involved? Or are you question on designing the block diagram?

Hope to hear from you soon.

Best Wishes

BB

[_AK6DN_ · Accepted solution]

Best answer is NO, but hard to be definitive without knowing how the clock/reset works on your 4b blocks.

Assuming positive edge clk and active high reset, then when you set rst low to enable the counter on the left, all

the other counters are held in reset because of the inverter in the reset line.

But if reset is high to enable all the counters on the right, then the one on the left is disabled.

So nothing will happen. Ever.

That being said, most ripple counters would just be a chain of, say, 4b counters, where q[3] of the prior block goes

to the clock input of the next higher block, and you would need falling edge triggered counters (or an inverter

in the path, assuming positive edge counters).

So, just google 'ripple counter' and you will see literally hundreds of examples.

[BoonBengT_Altera]

Hi @wilfleth,

Good to know that you have found the answers to your quesiton, with no further clarification on this thread, it will be transitioned to community support for further help on doubts in this thread. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support.

Thank you for the questions and as always pleasure having you here.

Best Wishes

BB