Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
17268 Discussions

Any way to measure external memory performance?

ZSher
Beginner
‎07-30-2018 02:00 PM
1,738 Views

Hello all,

 

I am working on an accelerator design that uses external memory. I would like to profile the memory to see if the design is making use of the available bandwidth, but I can't seem to find anything in Quartus that does that. The bus analyzer looks like it could perform that function, but it needs a Tcl script that I do not have and do not know how to create. Any hints? Thanks in advance.

0 Kudos

Link Copied

2 Replies
sstrell
Honored Contributor III
‎07-30-2018 05:20 PM
742 Views

If you're using the memory IP and enabled the option in the IP, you can use the EMIF Toolkit for this. It's in the Tools menu in Quartus.

0 Kudos
Copy link
ZSher
Beginner
‎07-30-2018 06:42 PM
742 Views

I have seen that since I posted this, I tried that and was unable to see how you could measure the bandwidth with it. I linked it to the Efficiency monitor but I did not see any activity reported even when the bus would definitely be in use. What needs to be enabled to use the toolkit for this?

0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.