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Conduits, in general

ESaiv
New Contributor I
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Hello! I am relatively new to FPGA-SoC system design, and especially Quartus Prime + Platform Designer (formerly Qsys). I have a conceptual question about conduits.

From reading Intel documentation, conduits are used to group arbitrary signals in Platform Designer. In some example projects I have seen, conduits are used to provide an external connection for some data read out from an Avalon MM Slave interface from the HPS portion of the device to the FPGA, e.g., data configuring some FPGA LEDs [7..0] to illuminate.

My question is: Why use a conduit, and not just pass data from the Avalon MM Slave interface directly to signals in VHDL (or Verilog)? 

For example, I want to pass configuration register data from an external MPU -> my Cyclone V HPS -> my top-level VHDL -> a lower-level VHDL subsystem: Would I use conduits, or could I just pass the Avalon MM Slave data directly to a signal in my top-level VHDL which corresponds to the destination in my lower-level VHDL? The use of conduits in this case seems like an unnecessary buffer, but to be sure, I don't fully understand their purpose or implementation. 

Thank you!

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sstrell
Honored Contributor III
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Avalon doesn't have LED0, LED1, etc. signals.  So you need an IP, like the PIO, to output a conduit to light the LEDs based on data written to the IP over Avalon from something like the HPS.

I'm not quite picturing your example, but conduits, in most cases, are simply exported out of a system.  You would not normally connect them to other conduit interfaces on other components inside the system.

Hope that helps.

#iwork4intel

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