Connecting Avalon Streaming signals to Signal Tap Logic Analyzer

[treble99]

Hello,

   I am trying to simulate PCIe_DDR4 example provided for Terasic DE5a-NET DD4(Intel Arria 10 GX FPGA (10AX115N2F45E1SG)). I have made a modification to the project. After opening it in Quartus Prime Pro [linux: 22.4.0] and going to Platform Designer [22.4 Build 94] I add a custom counter logic as a component and an Avalon FIFO [altera_avalon_fifo] in the System Viewer. Just the counter and the FIFO together were simulated in ModelSim and found to be working correctly.

The Avalon FIFO will connect to the pipe stage [altera_avalon_mm_bridge]  and write data to the DDR4 memory. The design does not function correctly on the FPGA when programmed. I have started a thread on simulating design. This is another where I want to use Signal Tap to inspect signals in the Ip blocks.

I am using Signal Tap as IP block(altera_signaltap_ii_logic_analyzer) in Platform designer. I want to hook avalon mm and avalon streaming signals to Signal Tap and inspect at runtime.

However, I am not able to do so, When I add the IP block to my design. System view does not let me connect avalon_streaming_source (avalon_data[31:0] )with the signal tap. i.e the tap does not connect to avalon_streaming_source [adding an image].

I am attaching screenshots of the both the ip blocks and settings.

How can I connect the signals to Signaltap and observe the FIFO and Counter contents at runtime?

Please let me know if you require more information.

Thanks!

[sstrell]

Don't run Signal Tap as an IP.  That's not a recommended flow, especially with Platform Designer since you can't manually instantiate and select signals to tap as you have found.  Remove that from PD, compile the design (or just run analysis & elaboration), create a new .stp file, and tap signals directly from the Node List (via the Node Finder) in Signal Tap.  Recompile and you're good to go.

[RichardTanSY_Altera]

Agreed with sstrell, we recommend users to use Signal Tap GUI.

Please checkout this user guide on how to add the signal tap into your project.

Reference Link: https://www.intel.com/content/www/us/en/docs/programmable/683819/22-4/creating-a-instance-with-the-gui.html

Best Regards,

Richard Tan

p/s: If you find any answers from the community or Intel Support to be helpful, we encourage you to mark them as the best answer or rate them 4/5 in the survey. 

[RichardTanSY_Altera]

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Best Regards,

Richard Tan

p/s: If you find any answers from the community or Intel Support to be helpful, we encourage you to mark them as the best answer or rate them 4/5 in the survey.