Error 10818

[jcl2000]

I keep getting Error (10818): Can't infer register for "anglecodeunsign[1]" at AngleCounter.vhd(19) because it does not hold its value outside the clock edge

using this code 

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity AngleCounter is
port(resetn,clock,enable,sresetn: in std_logic;
AngleCode: buffer std_logic_vector(7 downto 0);
Angle: buffer std_logic_vector(7 downto 0));

end entity AngleCounter;

architecture behavior of AngleCounter is
signal anglecodeunsign: unsigned(7 downto 0);
begin
process(resetn,clock,enable,sresetn)
begin
anglecodeunsign <= unsigned(AngleCode);
if(enable = '1') then
if(resetn = '0') then
anglecodeunsign <= "00000000";

elsif rising_edge(clock) then
if(sresetn = '0') then
anglecodeunsign <= "00000000";
elsif (anglecodeunsign <= anglecodeunsign +"00000001") then
if(anglecodeunsign > "00010000") then
anglecodeunsign <= "00000000";
end if;
end if;
end if;
end if;
end process;
AngleCode <= std_logic_vector(anglecodeunsign);

with AngleCode select
Angle <= "10010000" when "00000000", --0
"10000110" when "00000001",--1
"10000010" when "00000010",--2
"01111001" when "00000011",--3
"01110101" when "00000100",--4
"01110001" when "00000101",--5
"01100111" when "00000110",--6
"01100100" when "00000111",--7
"01100000" when "00001000",--8
"01010101" when "00001001",--9
"01010001" when "00001010",--A
"01000110" when "00001011",--B
"01000001" when "00001100",--C
"00110101" when "00001101",--D
"00101000" when "00001110",--E
"00100000" when "00001111",--F
"00000000" when "00010000",--10
"00000000" when others;
end architecture behavior;

If anyone could tell me what's wrong I would much appreciate it. 

[sstrell]

You put the clock rising edge check inside an if check for an enable.

Your order for control signal checks for a register inference is incorrect.  It should look something like this (you can also use a template in the Quartus text editor).  Note that if you're trying to create a counter (not sure if that is your intention), anglecodeunsign is going to go back to the value of AngleCode every clock cycle:

PROCESS(clock, resetn)
BEGIN
	anglecodeunsign <= unsigned(AngleCode);
        IF resetn = '0' THEN
		anglecodeunsign <= "00000000";
	ELSIF rising_edge(clk) THEN
		IF enable = '1' THEN
			IF sclrn = '0' THEN
				anglecodeunsign <= "00000000";
			ELSE
				IF anglecodeunsign > "00010000" THEN
                                       anglecodeunsign <= "00000000"
                                ELSE
                                   anglecodeunsign <= anglecodeunsign + '1';
                                END IF;
			END IF;
		END IF;
	END IF;
END PROCESS;

[RichardTanSY_Intel]

May I know whether the suggestion from sstrell help in your case?

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos. 

[RichardTanSY_Intel]

I have yet to receive any response from you and I believe you have found a solution to your case. 
With that, I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.