Fitter Error with Quartus Prime 18.0 for HPS_CLK1

[scong4]

I use HPS_CLK1 as system clock , but can't assign it .

Here is the error message and my design.

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Error(14566): The Fitter cannot place 2 periphery component(s) due to conflicts with existing constraints (2 pin(s)). Fix the errors described in the submessages, and then rerun the Fitter. The Intel FPGA Knowledge Database may also contain articles with information on how to resolve this periphery placement failure. Review the errors and then visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. 

Error(175020): The Fitter cannot place logic pin that is part of gflish gflish in region (79, 120) to (79, 120), to which it is constrained, because there are no valid locations in the region for logic of this type. 

Info(14596): Information about the failing component(s): 

Info(175028): The pin name(s): clk_clk 

Error(16234): No legal location could be found out of 1 considered location(s). Reasons why each location could not be used are summarized below: 

Error(175005): Could not find a location with: IO_FUNCTION of GPIO (1 location affected) 

Info(175029): B16 

Info(175015): The I/O pad clk_clk is constrained to the location PIN_B16 due to: User Location Constraints (PIN_B16) 

Info(14709): The constrained I/O pad is contained within this pin 

Error(175020): The Fitter cannot place logic pin that is part of gflish gflish in region (79, 129) to (79, 129), to which it is constrained, because there are no valid locations in the region for logic of this type. 

Info(14596): Information about the failing component(s): 

Info(175028): The pin name(s): reset_reset 

Error(16234): No legal location could be found out of 1 considered location(s). Reasons why each location could not be used are summarized below: 

Error(175005): Could not find a location with: IO_FUNCTION of GPIO (1 location affected) 

Info(175029): L14 

Info(175015): The I/O pad reset_reset is constrained to the location PIN_L14 due to: User Location Constraints (PIN_L14) 

Info(14709): The constrained I/O pad is contained within this pin 

[KhaiChein_Y_Intel]

Hi,

May I know if you have any updates?

Thanks.

Best regards,

KhaiY

[scong4]

No , I found other method to solve my problem, so I will not update this topic.

Thank you for your help.

[KhaiChein_Y_Intel]

Hi,

Sure. You are welcome to open a new forum post if you have any questions in the future.

Thanks.

Best regards,

KhaiY