How to use ip-generate on a hierarchical sys system

[Altera_Forum]

Hi, 

 I am using ip-generate to compile a Qsys design into Verilog code than can be programmed into the FPGA and test benches for simulation. I have a single level Qsys system working, but my primary target has several qsys subsystems within a top level Qsys system. Can I use ip-generate directly to compile the hierarchical Qsys system? Do you have any example scripts which show how to do that? My current script reports the underlying sys sub-systems are "not found" even if I actually copy them to the local dir.  If the hierarchical project cannot be compiled in one go with ip-generate as can be done by the GUI. What is the recommended multi-step process and what are the recommended intermediate targets for a Makefile?  Thanks Martin  ps. I don’t see arguments to direct ip-generate to create a test bench but I did see an example which seemed to use a testbench specific .qsys file. !? What’s the best way to use ip-generate to creat a testbecnh from a .qsys system?

[Altera_Forum]

I don't know the answer to the hierarchy question, but I have a suggestion that might work ... 

 To determine what arguments to pass to ip-generate, I use the GUI and then copy the ip-generate arguments into a script, eg., this BeMicroCV design has an example for the DDR controller (see the zip file with post#5)  http://www.alteraforum.com/forum/showthread.php?t=43992  If you use "generate" from the Qsys GUI, the logging dialog box most likely has the sequence you need.  The same thing goes for generating simulation files; check the checkboxes in the GUI, click generate, and look at the log in the dialog that pops up.  Cheers, Dave

[Altera_Forum]

That was a great suggestion Dave. 

 I have progressed further, but I am having trouble figuring out the steps to generate the SoC BFM based simulation test benches.  I can do it in the GUI.  It is one click on "Generate HDL test benches"  In the log file I see 2 x calls to ip-generate but there is a call to a TC script tbgen.tcl in between  Only the output of that script is shown in the report file so I cannot see how it is called. There is a comment in the script file  /tools/altera/14.0/./quartus/sopc_builder/bin/tbgen.tcl which suggest it may be called by sop_builder, but I cannot find a command line exec for sop_builder.  Any suggestions on tracking down the exact calls made by the GUI?  Thanks again Martin

[Altera_Forum]

ps. a find returns: 

 /tools/altera/./14.0/quartus/sopc_builder /tools/altera/./14.0/quartus/sopc_builder/bin/sopc_builder.jar /tools/altera/./14.0/quartus/sopc_builder/bin/sopc_builder.ptf /tools/altera/./14.0/quartus/sopc_builder/model/bin/sopc_builder.pl /tools/altera/./14.0/ip/altera/ddr_high_perf/lib/sopc_builder /tools/altera/./14.0/ip/altera/ddr_ddr2_sdram/lib/sopc_builder /tools/altera/./14.0/ip/altera/ddr3_high_perf/lib/sopc_builder /tools/altera/./14.0/ip/altera/pci_compiler/lib/sopc_builder /tools/altera/./14.0/ip/altera/pci_compiler/sopc_flow/example/sopc_builder_example_readme.txt /tools/altera/./14.0/ip/altera/sopc_builder_ip /tools/altera/./14.0/ip/altera/ddr2_high_perf/lib/sopc_builder /tools/altera/./14.0/qprogrammer/sopc_builder

[Altera_Forum]

--- Quote Start ---  I can do it in the GUI.   --- Quote End ---   Can you copy-and-paste the contents of the generate GUI and email it to me (to my forum name), or just post it to this thread as a .txt attachment. It'll help to see the complete output.  I'm not sure that I'll be able to find a solution, but at least I can confirm its confusing, and you could then file a Service Request with Altera :)  Lets see if we can figure it out first ...  Cheers, Dave

[Altera_Forum]

I uploaded the full report file: 

 ghrd_5astfd5k3_generation.rpt.txt.  I had to append the .txt to upload.  I need to figure out 2x things.  How to run sop_builder command line under Linux.  And what the arguments are to the script.   Thanks Martin

[Altera_Forum]

--- Quote Start ---   ghrd_5astfd5k3_generation.rpt.txt.   --- Quote End ---   Thanks. Based on the fact that ip-generate only runs twice, I guess you only had simulation and testbench options selected (not synthesis). (I don't care that synthesis was not checked, I'm just making an observation).    --- Quote Start ---   How to run sop_builder command line under Linux.   --- Quote End ---   There is no sopc_builder any more (the fact that the name exists as part of the tool path is due to Altera not making their filesystem paths consistent with their tool names). I think this is an error in your thinking. There is only ip-generate, or qsys-generate (according to the 14.0 documentation!).    --- Quote Start ---   And what the arguments are to the script.   --- Quote End ---   Its more likely that the script is an argument to ip-generate, than to sopc_builder.  Ok, I see the message ...  Info: Running script /net/tcfiler2.scs.agilent.com/vol/v51/rpdhw/tools/altera/14.0/quartus/sopc_builder/bin/tbgen.tcl  I'll go login on my 14.0 machine (Windows 7) and look at this script. I'll see if I can figure out what command-line tool it is run with, eg., ip-generate or something else.  Cheers, Dave

[Altera_Forum]

--- Quote Start ---   I'll go login on my 14.0 machine (Windows 7) and look at this script. I'll see if I can figure out what command-line tool it is run with, eg., ip-generate or something else.   --- Quote End ---   The script comments imply that it used to be run by a tool called sopc_builder, but there is no sopc_builder.exe file in that directory any more.  Looking in the 12.1 directory shows that sopc_builder used to be a perl script that called sopc_builder_classic.pl which is also no longer in the 14.0 installation.  I tried running qsys-script on the tbgen.tcl file with a qsys_system.qsys file I had, but it failed.  Its time for you to create a simplified version of your design and file a service request with Altera. Please post the design and results here if you can, so that others can comment, or learn (hopefully from your success).  Cheers, Dave

[Altera_Forum]

Hey Martin, 

 Since you are playing with these tools, take a look at de0_nano_sdram.zip in this thread;  http://www.alteraforum.com/forum/showthread.php?t=45927  The thing you want to look at is scripts/qsys_system.tcl, i.e., the Qsys system has been converted to a Tcl script, rather than an XML file. This allows the differences in Quartus versions to be absorbed into the Tcl. For example, the SDRAM controller parameters have changed.  I suspect that your hierarchical qsys system could be converted to several Tcl scripts that might be a little easier to maintain ...  Cheers, Dave