Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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IP Files Necessary for Compilation

jeelliso
新手
2,335 次查看

I'm having issues recompiling a project pulled from a version control repository in Quartus Prime Standard 19.1 due to errors related to a specific FIFO IP.

If I include the .qsys and .qip files in the repository and try to compile from scratch, I receive the following error:

"QIP file that is being generated from a Platform Designer file already exists in the project."

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ShengN_Intel
员工
2,330 次查看

Hi,


You can't include both the .qsys and .qip files in the GUI at the same time for compilation. Can only include either one.


Thanks,

Regards,

Sheng


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jeelliso
新手
2,279 次查看

Thanks for your response. It looks like the error persists even if I remove the .qip file from the project. If I remove the .qsys file, the error goes away. Any idea why this is the case?

 

Best,

 

Jack

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sstrell
名誉分销商 III
2,269 次查看

The .qip is the output from generating the IP from the parameter editor.  If you include the .qip, that means the IP has already been generated and compiles successfully as you've mentioned.  If you include the .qsys, that means the IP has not been generated.  It should generate automatically at the beginning of compilation, but I have seen sometimes that it doesn't, so you would have to manually generate first and include the .qip instead.

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ShengN_Intel
员工
2,237 次查看

Ya, make sure regenerate the platform designer system before include the .qsys.


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ShengN_Intel
员工
2,158 次查看

Hi,


Do you have any further update? Does the problem being resolved?


Thanks,

Regards,

Sheng


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