Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
15322 Discussions

May I put a structural model inside the process


Hello everyone,


I have bunch of concurrent statement in different structure module and I need to run them in a sequence. Is there a way to do it.


Like I have multiple instantiation of different module. Most of them consist concurrent statement. I want these module to run one by one. I am using VHDL ( It solution should be implementable on FPGA )

0 Kudos
1 Reply
Honored Contributor III

It's not clear what you're looking for. Can you post some code?


The closest I can guess from your description is the use of the generate command to control the instantiation of entities.