ModelSim error when initializing Avalon-MM slave BFMs

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I'm trying to simulate the mSGDMA core. I created a Qsys system with two mSGDMA cores (one for MM to ST and another for ST to MM), exported all of the I/O, and had Qsys generate a testbench system with BFMs for all of the interfaces. 

 In the generated testbench file I added `defines to shorten the BFM names and added an initial block with commands to initialize all of the BFMs:  `define TX_DMA_CSR_MASTER msgdma_test_inst_msgdma_hps2im_csr_bfm `define TX_DMA_DESCR_MASTER msgdma_test_inst_msgdma_hps2im_descriptor_slave_bfm `define TX_DMA_ST_SINK msgdma_test_inst_msgdma_hps2im_st_source_bfm `define TX_DMA_READ_SLAVE msgdma_test_inst_msgdma_hps2im_mm_read_bfm  `define RX_DMA_CSR_MASTER msgdma_test_inst_msgdma_im2hps_csr_bfm `define RX_DMA_DESCR_MASTER msgdma_test_inst_msgdma_im2hps_descriptor_slave_bfm `define RX_DMA_ST_SOURCE msgdma_test_inst_msgdma_im2hps_st_sink_bfm `define RX_DMA_WRITE_SLAVE msgdma_test_inst_msgdma_im2hps_mm_write_bfm  initial  begin   //  // Initialize BFMs.  //  `TX_DMA_CSR_MASTER.init();  `TX_DMA_DESCR_MASTER.init();  `TX_DMA_ST_SINK.init();  `TX_DMA_READ_SLAVE.init();   `RX_DMA_CSR_MASTER.init();  `RX_DMA_DESCR_MASTER.init();  `RX_DMA_ST_SOURCE.init();  `RX_DMA_WRITE_SLAVE.init();   end  When I compile and load the testbench I get the following errors in ModelSim (PE v10.5a, not ModelSim-AE): # ** Error: (vsim-8220) ./../msgdma_test_tb.v(82): This or another usage of 'msgdma_test_inst_msgdma_hps2im_mm_read_bfm.init' inconsistent with 'function' object. # ** Error: (vsim-8220) ./../msgdma_test_tb.v(87): This or another usage of 'msgdma_test_inst_msgdma_im2hps_mm_write_bfm.init' inconsistent with 'function' object.  So calling the init() function for both Avalon-MM slave BFMs resulted in this error. The init() function is definitely defined for these BFMs but the error message is cryptic at best. Anyone have a clue what the problem is?  The Qsys system was generated with Quartus Prime 16.0.  Thanks, Bob