On-chip Debugging Design Examples .qar can't be loaded

[astrocyte]

I've downloaded the Systemconsole_design_example.qar from the URL provided under the documentation resources: https://www.intel.com/content/www/us/en/programmable/support/support-resources/design-examples/design-software/on-chip-debugging.html to help me get started with  System Console. Unfortunately, when I try to open the file in Quartus, I have an error that says "Project archive restoration failed. Your project may be corrupted.". Is there a different repository where I can find these examples? I'd appreciate if you could point me to any relevant resources for getting started with System Console (ideally also integration with MATLAB for Nios2 based designs).

[SyafieqS · Accepted solution]

Hi Horia,

Can you navigate to below link and download Introduction to FPGA Simulation and Debug materials there?

https://software.intel.com/content/www/us/en/develop/topics/fpga-academic/materials-workshops.html

Design file you referred probably an old design I can see 10.1 release.

[astrocyte]

Hi SyafieqS_Intel,

Excellent - thank you. I managed to configure my project for use with the System Console in the meantime, by adding a JTAG to Avalon Master Bridge. I'm writing ADC readings to On-Chip RAM using IOWR_32DIRECT and reading the values from the System Console using a TCL script. Having a quick look through the resources, I didn't find anything relating to reading the data directly from into Matlab.

My aim is to plot the ADC readings by accessing the On-Chip RAM from Matlab through the System Console/TCL. A search leads me to:
https://www.intel.com/content/www/us/en/programmable/products/design-software/fpga-design/quartus-prime/features/qts-systems-console.html

but these resources also seem to be outdated, because Flash is no longer supported. Is there a newer version of these? 

EDIT: For context, I tried printf and bitbang to nios2-terminal, but it reduces the ADC sample rate (which is already limited by SPI transactions) by a considerable amount.

[astrocyte]

I think I found what I was after, here:
https://uk.mathworks.com/help/supportpkg/alterafpgaboards/matlab-axi-master.html?s_tid=CRUX_topnav

[astrocyte]

Great resources, I managed to optimize the design, achieving 159 SPS with 8 channels on and 1.2k SPS with 1 channel on - which should be sufficient. I'm still printing to the Nios2 terminal - the limiting factors were due to timing and there are more optimizations possible. 
On a side note, I scripted a TCL adapter for reading the memory directly, but printing to JTAG UART still performs better.