Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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OpenCL Compiling andother Improvments

Altera_Forum
Honored Contributor II
1,157 Views

Hi, I'am back after severel years. 

 

I'am an information technician and develope for (ASM,Pascal,C++,C#,php, nodejs) for 18 years now as a day job. 

 

Back in 2001/2002 I developed an well desigend and fast Bitcoin miner for an XD2000i (Stratix III). 

 

And now I got my hand on two Terasic TR5-F45M (5SGXEA7N2F45C2) or DE5Net and have a new project developing... 

 

I develop on my old custom build PC 

-CPU AMD FX 8350 (8-Core) 

-RAM 16GB 

-TR5-F45M (Stratix V) 

-Windows 10 Pro 64 

-Altera/Intel FPGA OpenCl SDK 

-Visual Studio 2017 

 

I have moved the whole "altera" folder and the project to an fast PCI-e SSD, and my compile times (first stage) dropped from 10 to 20 minutes to around 2 minutes. 

 

The second stage now uses up to 100% of all 8 cores and aound 12 GB RAM, and that wasn't so before, I utilized around 12% to 25 % on average. 

 

compiling still takes time, and I just sit here and wait.. but I wanted to tell you about this improvemnt. 

 

best regards Dennis 

 

any comments are welcome.
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Altera_Forum
Honored Contributor II
348 Views

 

--- Quote Start ---  

Hi, I'am back after severel years. 

 

I'am an information technician and develope for (ASM,Pascal,C++,C#,php, nodejs) for 18 years now as a day job. 

 

Back in 2001/2002 I developed an well desigend and fast Bitcoin miner for an XD2000i (Stratix III). 

 

And now I got my hand on two Terasic TR5-F45M (5SGXEA7N2F45C2) or DE5Net and have a new project developing... 

 

I develop on my old custom build PC 

-CPU AMD FX 8350 (8-Core) 

-RAM 16GB 

-TR5-F45M (Stratix V) 

-Windows 10 Pro 64 

-Altera/Intel FPGA OpenCl SDK 

-Visual Studio 2017 

 

I have moved the whole "altera" folder and the project to an fast PCI-e SSD, and my compile times (first stage) dropped from 10 to 20 minutes to around 2 minutes. 

 

The second stage now uses up to 100% of all 8 cores and aound 12 GB RAM, and that wasn't so before, I utilized around 12% to 25 % on average. 

 

compiling still takes time, and I just sit here and wait.. but I wanted to tell you about this improvemnt. 

 

best regards Dennis 

 

any comments are welcome. 

--- Quote End ---  

 

 

Hi. I saw you try to mine Ethereum on FPGA. You uses TR5-F45M . Is it was successful?
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