Platform Designer Tutorial Address range Error

[SOkte]

I am following the guide AN 812: Platform Designer System Design Tutorial, I received the below error.

Error: sysA.cpu.data_master: pipeline_bridge.s0 (0x0..0xffff) is outside the master's address range (0x0..0xfff)

How to solve this structurally? (Using Platform Designer 18.1 Build 222)

[SOkte]

I have attached the address width of the CPU

In the edit assignments menu it is 17 bit wide, in the ​signals interfaces menu it is 12 bits wide

[AnandRaj_S_Intel]

Hi,

Yes,i can reproduce the error.However we can solve it

Before assign the Base address and click on lock, we have go to do system ->assign Base address.and assign the Base address and click on lock as per AN812.

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards,

Anand

[SOkte1]

The problem is solved.