Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Qsys 18.1 automatic ip generation not working

jsnow8
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Hi guys, I am new to fpga development and I have a question regarding qsys 18.1 ip generation.

 

When using qsys 17 the function "qsys-generate" works great. However, qsys 18's "qsys-generate" is not enough. The pnr process fails because no ip files were generated. How can I use cli to generate all needed files from a .qsys file?

 

Thank you guys!

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KennyTan_Altera
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This seems to be a bugs to me, can you attached your qsys files for us to have a look? Attached two qsys files, one is 17 and another is 18.1

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KennyTan_Altera
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Any update?

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jsnow8
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Thank you for answering.

unfortunately I can't upload the qsys file since it is company property.

However the qsys is very simple and only has 1 ip core so I don't think this is case specific.

 

p.s. Do you know how to generate a _hw.tcl file in quartus 14.0 from a .qsys file using linux cli?

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KennyTan_Altera
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We can sign up an NDA and we can work offline on this. You may check your email for details.

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jsnow8
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As I said before, the qsys is very simple and only has the i2c ip core. So I think we don't need an NDA I just can't upload the qsys.

Could you please explain the normal way to generate the required ip cores from a qsys file?

Thank you again.

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KennyTan_Altera
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Just go to platform designer to create the i2C ip cores, I will attached the design.qar here. Let me know the steps that you had used where your pnr process failed.

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KennyTan_Altera
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If you can attached you simplified project.qar, it would be great.

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KennyTan_Altera
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any update?

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