Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Reading inputs in a state-machine

AIbra11
Novice
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Hello, 
I've spent a lot of time trying to get this state machine working with no hope.

 

Requirement: In this FSM, we want to set:

- opcode_reg and offset_reg to USB3_DATA(3 downto 0) and USB_DATA(15 downto 4) respectively in GET_OPCODE_OFFSET state (and keep its value after that)

- RegLengthCounter to unsigned(USB3_DATA(11 downto 0)), and RegPointer to unsigned(OffsetReg) in GET_LENGTH state. (and keep its value after that)

 

Here is the code I've written so far (attached), specifically processes:

USB_CLK_PROC and RegProxy_FSM_Proc

 

Problem:

- The data is registered correctly, but changes at the next clock edge, how can I keep it fixed?

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sstrell
Honored Contributor III
356 Views

Follow the LHS (left hand side)!

Are you sure USB3_DATA isn't changing at all?  You have it in a separate assignment (non-clocked logic), so it will update immediately if there is a change:

USB3_DATA <= USBSendDataOut when USBWrOeRSig = '1' else (others => 'Z');

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AIbra11
Novice
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Thank you, it was a timing issue, I was wrongly sampling the data at the same edge when it changes.

Changed sampling moment to be on the opposite clock edge.

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