Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
17255 討論

Signaltap - Crashing when attaching .sof file

GDagi1
新貢獻者 I
1,945 檢視

Hi all,

I generated a .sof file on a server running CentOS 8 and Quartus Pro 20.4. I am attempting to run a signaltap on the .sof after dragging it to a server running RHEL 7.9 and Quartus Pro 20.4.

 

My process:

1. run /intel/intelFPGA_pro/20.4/quartus/bin/.quartus_stpw (Signaltap Pro)

2. Configure stp (see screenshot)

3. Attempt to attach .sof -> crash

 

*** Fatal Error: Segment Violation: faulting address=0xfffffffffffffff8, PC=0x7f735f7b99c5 : 0x7f735f7b99c5: sld_sdr!SDR_DATA_SESSION::embed_sof_file(char const*, char const*) + 0x8b9

 

Thanks,

George

0 積分
1 解決方案
GDagi1
新貢獻者 I
1,912 檢視

I have solved my issue by programming from the programmer independently:

run /intel/intelFPGA_pro/20.4/quartus/bin/.quartus_pgmw

 

在原始文章中檢視解決方案

4 回應
JohnT_Intel
員工
1,927 檢視

Hi,


May I know what is the reason that you are attaching sof file in step 3 since you already program the sof file in step 2?


May I know if you have another PC to test the same thing?


GDagi1
新貢獻者 I
1,912 檢視

Step 2 I am simply scanning for the device.

GDagi1
新貢獻者 I
1,913 檢視

I have solved my issue by programming from the programmer independently:

run /intel/intelFPGA_pro/20.4/quartus/bin/.quartus_pgmw

 

JohnT_Intel
員工
1,902 檢視

Glad to hear that your issue is resolved.


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