Timequest difference between 11.1sp1 and 13.1

[Altera_Forum]

Have an SDC file with this constraint for some data output signals: 

 set Clock100p0MHz PLL:inst28|……..auto_generated|wire_pll1_clk[3] set_output_delay -add_delay -max 1.0 -clock $Clock100p0MHz [get_ports SomeSignals*]   With 11p1sp1, Timequest sees the set_output_delay as a valid command, but in 13.1 and 15.1, TimeQuest throws an error saying that there is no such clock “Clock100p0MHz”  is there a different way now to constrain IO pins?

[Altera_Forum]

--- Quote Start ---  Have an SDC file with this constraint for some data output signals:  set Clock100p0MHz PLL:inst28|……..auto_generated|wire_pll1_clk[3] set_output_delay -add_delay -max 1.0 -clock $Clock100p0MHz [get_ports SomeSignals*]   With 11p1sp1, Timequest sees the set_output_delay as a valid command, but in 13.1 and 15.1, TimeQuest throws an error saying that there is no such clock “Clock100p0MHz”  is there a different way now to constrain IO pins?  --- Quote End ---     Maybe recompilation changed "auto_generated|wire_pll1_clk[3]" signal name?