Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Troubles with Questa and gatelevel simulations


I've just installed Quartus Prime Lite 21.1 and for first time trying use the Questa Intel Starter FPGA in place of Modelsim. All seem quite compatible, i should even  say the same program with another name, but with Questa i'm not able to run properly gate level simulations.

Configuring in similar way Quartus using Questa in place of Modelsim when i select

Tools->RunSImulationTool->GateLevel Simulation, Questa is called, but the window for choosing the timing model doesn't appear and the simulation is like the RTL one without any delay.

Any suggestion?

About the setup i'm doing the sequence shown on this intel-fpga video, good for Modelsim but not for Questa .




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Honored Contributor III

What is your target device?  Newer families don't support timing-based gate-level simulations.

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