Unable to detect intel readback/writeback IP in quartus IP catalog

[achandel]

Hi,

I am new to the Quartus world, and have been stuck on an issue.

I am trying to open the intel readback/writeback IP (interl_wrbk_wrbk) in Quartus GUI.

From one of the docs, I understood that any IP will be visible in quartus "IP catalog" if my project directory or IP global search directory has either the *.ip file, or *_hw.tcl file along with all the necessary rtl files. 

I currently have intel_rdbk_wrbk_hw.tcl file (to generate the IP) and all the relevant rtl files mentioned in this tcl file. 

Now, when I open Quartus in this directory, I cannot see this IP in IP catalog.

After this, I updated the Global IP search directory to include the directory from where I copied the *_hw.tcl file, but again, there was nothing.

The aim is to generate the simulation files once I can see the IP in the Quartus GUI, in order to test and debug the logic I wrote to drive this IP (Using Avalon MM-slave interface).

Any pointers on this will be appreciated.

Please let me know if any other information on this is required.

Thanks

[sstrell]

Can you link to the document you're talking about?  I've never heard of this IP.  If it's an "off-the-shelf" IP included with Quartus, it would be in the IP Catalog already.

[achandel]

Hi @sstrell,

This IP is specifically for the Altera FPGA board, provided by intel. It is not specific to Quartus. It is normally driven by a master (like Avalon MM) for readback/writeback purposes from the hardware.

Unfortunately, I am not sure If I'm allowed to share the document publicly.

[KhaiChein_Y_Intel]

Hi,

Could you share a design and steps to reproduce the error?

Thanks

Best regards,

KhaiY