Unable to use Avalon-MM master verification BFM in Questa sim

[RHenr]

Hello,

I have a bug similar to the one reported here :
https://community.intel.com/t5/Intel-Quartus-Prime-Software/Avalon-Verification-IP-example-avlmm-1x1-vhdl-not-working-in/m-p/1516388

I tried to follow the given solution, but it makes Questa sim crash. Moreover, it seems the -novopt option is deprecated.

If I remove the "-suppress 12110" option, Questa sim does not crash but reports this error, thus simulation is also not possible.

# ** Error (suppressible): (vsim-12110) All optimizations are disabled because the -novopt option is in effect. This will cause your simulation to run very slowly. If you are using this switch to preserve visibility for Debug or PLI features, please see the User's Manual section on Preserving Object Visibility with vopt. -novopt option is now deprecated and will be removed in future releases.

[ShengN_Intel]

Hi,

Can you try invoke the simulator first from command prompt using vsim -suppress 12110, then only in simulator execute run_simulation.tcl script

Thanks,

Best Regards,

Sheng

[RHenr]

Questa also crashes.

[ShengN_Intel]

Hi,

How about using vopt? Does the problem still exist?

Thanks,

Sheng

[RHenr]

When vopt is enabled, I have the same issue as reported by someone else in this thread : https://community.intel.com/t5/Intel-Quartus-Prime-Software/Avalon-Verification-IP-example-avlmm-1x1-vhdl-not-working-in/m-p/1516388 .

When using avalon-mm BFM, the first transaction is ok but the second one gets stuck waiting for event_response_complete. The same code was working fine in modelsim.

[ShengN_Intel]

Hi,

I had used the Quartus® Prime Standard Edition Design Software Version 23.1 with Questa Starter Edition 23.3 and tested on the example design avlmm-1x1-vhdl without any problem check attached log file and waveform.

One more thing is making sure delete the modelsim.ini file and libraries folder before run the new simulation.

Thanks,

Sheng

[RHenr]

Ok, I will try to cleanup everything and test again.

[ShengN_Intel]

Hi,

Any further update or concern? Does the problem being resolved?

[RHenr]

Still crashing

[ShengN_Intel]

Hi,

Are you using Quartus® Prime Standard Edition Design Software Version 23.1 with Questa Starter Edition 23.3 and tested on the example design avlmm-1x1-vhdl?

How about un-install the tool and reinstall does the problem resolved?

Or does your machine run out of memory?

Thanks,

Best Regards,

Sheng

[RHenr]

Quartus is standard edition 23.1 and questa is 23.3 Fpga edition (not starter).

Here is result of the example design without the workaround.

It does not crash and works with the workaround.

[IgorKa]

Hello.

The problem is that the QuestaSim optimizer flashes the delta-events. If you are using multilanguage QuestaSim, the solution is to make little tunning in the "altera_avalon_mm_master_bfm_vhdl_wrapper.sv" file:

1) Change timescale resolution `timescale 1ps / 1ps

2) In line 519 add "#1", like:

always @(mm_master.signal_all_transactions_complete) begin
events[MM_MSTR_EVENT_ALL_TRANSACTIONS_COMPLETE] = 1;
#1 events[MM_MSTR_EVENT_ALL_TRANSACTIONS_COMPLETE] <= 0;
end

It will solve the problem. You can save the custom file and each Platform Design reconfiguration, just replace the "altera_avalon_mm_master_bfm_vhdl_wrapper.sv" file with a patched one.

Good Luck

Igor

[FabianL]

Hello,

I have the same issue it is still present in Quartus 25.1. Are there any plans on fixing this issue? 

best regards

Fabian