Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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can't place multiple pins assigned to pin location

CWarr1
Beginner
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I understand from other posts that the root cause of this error is that the pin in question has already been assigned by QSYS.

My question is: why are pins allocated in QSYS not marked as 'used' in the Pin Planner or the Assignment Editor ?

Thanks

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sstrell
Honored Contributor III
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Without seeing the actual message or your design, it's impossible to figure out what's going on here. Qsys (now called Platform Designer) does not allocate or assign I/O pins. Perhaps you mean that the Fitter selects I/O locations during compilation. However, the locations selected by the Fitter are not user assignments so they are not "locked" into place.

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