Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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cyclone II differential IO error

Altera_Forum
Honored Contributor II
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Hi, 

 

I have an LVDS transmitter and LVDS receiver in my design and i am getting below error when i do systhesis. 

 

"Input port DIFFERENTIALIN can only connect to output port DIFFERENTIALOUT of another IO atom" 

 

I have also attached the file in which it is giving this error. 

 

Thanks,
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Altera_Forum
Honored Contributor II
519 Views

 

--- Quote Start ---  

Hi, 

 

I have an LVDS transmitter and LVDS receiver in my design and i am getting below error when i do systhesis. 

 

"Input port DIFFERENTIALIN can only connect to output port DIFFERENTIALOUT of another IO atom" 

 

I have also attached the file in which it is giving this error. 

 

Thanks, 

--- Quote End ---  

 

Goto Assigment -> Pin planner. Select that you signal is LVDS. Connect positive and negative signals to pins.
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Altera_Forum
Honored Contributor II
519 Views

The solution you suggested does not work, still i am getting sythesis error.

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Altera_Forum
Honored Contributor II
519 Views

ARTEM, 

 

one more thing when i chane the device to cyclone III and do sythesis then it does not give any error even if i do not assign pin for LVDS signals. 

 

Is it some issue with ALTLVDS of cyclone ii? 

 

regards,
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