duplicate a component

[Altera_Forum]

Hello, 

I am having a problem with component duplication. I would like to duplicate this 2 port maps in one command (loop,generate...) I have 2 types of parametes that need an Index:  1.1bit from an std_logic_vector m0_piezo_lg_p(0) 2.a regular register (m0_hifu_hv_pw0). Can somebody assist?  Many thanks  M0_pulser_block0: pulser port map  (  clk_64m => clk_64m,  reset_n => reset_n,  piezo_p => m0_piezo_lg_p(0),  piezo_n => m0_piezo_lg_n(0),  fire_busy => m0_fire_busy(0), fire_piezo_1clk_r => fire_piezo_1clk_r,  fire_piezo_1clk_f => fire_piezo_1clk_f, hifu_cal_sel => hifu_cal_sel, hifu_hv_pw => m0_hifu_hv_pw0,  cal_hv_pw => m0_cal_hv_pw0,  phase_delay => m0_phase_delay0,  stdn => stdn, break_duration_reg => break_duration_reg );   M0_pulser_block1: pulser port map  (  clk_64m => clk_64m,  reset_n => reset_n,  piezo_p => m0_piezo_lg_p(1),  piezo_n => m0_piezo_lg_n(1),  fire_busy => m0_fire_busy(1), fire_piezo_1clk_r => fire_piezo_1clk_r,  fire_piezo_1clk_f => fire_piezo_1clk_f, hifu_cal_sel => hifu_cal_sel, hifu_hv_pw => m0_hifu_hv_pw1,  cal_hv_pw => m0_cal_hv_pw1,  phase_delay => m0_phase_delay1  stdn => stdn, break_duration_reg => break_duration_reg );

[Altera_Forum]

You will need to declare your register as two dimensional array then apply: 

for i in 1 to 2 generate ...

[Altera_Forum]

can I do something like this ? 

 many thanks!!!!     1. ARCHITECTURE ------------------------------- COMPONENT pulser ------------------------------- PORT (    hifu_hv_pw :in std_logic_vector ( 7 downto 0 ) --0->15 hifu_pw ); END COMPONENT;   2.ARCHITECTURE     type m0 is array (1 downto 0) of std_logic_vector(7 downto 0);  signal array_pw: m0 ;    3. BEGIN   hifu_hv_pw0<="01010101"; hifu_hv_pw1<="11111111";  array_pw <= hifu_hv_pw1 & hifu_hv_pw0 ;   4. PORT MAP   puls : for n in 1 downto 0 generate  pulser_port:pulser  port map  (   hifu_hv_pw => array_pw(n)  );  end generate puls;

[Altera_Forum]

you got the idea. 

 But assign as follows: array_pw(1) <= "11111111"; array_pw(0) <= "01010101";

[Altera_Forum]

Many thanks for you help. 

 I have one more question related to my design,   I have another component that has lots of registers (120 registers 8bit each). In this case I can declare an Array in side this component.  my quaestion is:  can I drive it out of this component to the top level?   I was trying to do that with no success, how should I define this output?     ENTITY registers IS PORT (    my_array :out -- .....??   ); END;

[Altera_Forum]

But be careful about multiple drive

[Altera_Forum]

I opened a new thead relating this quastion, so nobody will be confuse. 

 thanks